This invention relates to an arrangement for generating drive signals to be supplied to a plurality of windings of a multi-phase d.c. motor, comprising a multi-phase inverter which supplies the drive signals to the windings of the motor in such a manner that these windings are recurrently energized by the drive signals in a given sequence, at least one winding not being supplied with a drive signal at least during predetermined free periods; a phase detector which, under control of said multi-phase inverter, during a plurality of said free periods in which no drive signal is applied to said windings, multiplexes the back-emf signals of these windings in order to obtain a phase-error signal; a first low-pass filter which generates a control signal dependent upon the phase-error signal; and a controllable oscillator which generates a frequency signal whose frequency depends on the control signal, the timing with which the multi-phase inverter supplies the drive signals to the windings being dependent on the frequency signal, the arrangement thus comprising a phase-locked loop formed by the multi-phase inverter, phase detector, first low-pass filter and oscillator.
The invention also relates to a lock detector for use in such an arrangement, to a drive arrangement comprising a multi-phase d.c. motor and such an arrangement, and to a system for storing and/or reproducing information on/from an information carrier and including such a drive system.
Brushless d.c. motors driven by an inverter generally use a feedback loop to maintain a desired phase-angle relationship between the position of the rotor and the stator at the instant that a winding is energized. The phase-angle relationship may be selected, for example, in such a manner that the motor produces a maximal torque.
A free period of a winding generally occurs within or coincides with a drive period of another winding, in which this other winding receives drive signals. The beginning and the end of a free period of a winding generally also coincide with the beginning or the end of a drive period of other windings. In the case of, for example, a three-phase motor this means that at any instant a drive signal is applied to two windings (during two drive periods which are 120.degree. phase-shifted relative to one another), while no drive signal is applied to a third winding (during a free period which is half as long as each drive period). This third winding is kept "floating" and generates a back-emf signal, known per se.
Such an arrangement is known from U.S. Pat. No. 4,928,043. This known arrangement includes a feedback loop comprising the phase detector, the low-pass filter and the controllable oscillator. This feedback loop is consequently a phase-locked loop (PLL). The phase detector combines the successive back-emf signals from one or more windings to form the phase error signal, in which all back-emf signals are given the same polarity. The low-pass filter is constructed as an integrator which compares the back-emf voltages of a winding with a reference value and integrates the difference in order to obtain a control signal for the oscillator. The control signal controls the oscillator of the VCO type, which in its turn controls the switching instants of the multi-phase converter. If the desired position of the rotor of the motor, which is determined by the inverter, deviates from the actual position of the rotor, the voltage of the control signal will change accordingly and will cause the VCO to correct the switching instants of the inverter so as to counteract the deviation. The voltage of the back-emf signal has an optimum for which the motor generates a maximal torque. By means of the PLL a deviation of this voltage results in a change of the control signal so as to counteract the deviation.